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Digital Signal Processing and System Validation Engineer Edit listing

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Description

**Please Note:**

**1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)**

**2. If you already have a Candidate Account, please Sign-In before you apply.**

****Job Description:****

Broadcom is looking for a Digital Signal Processing and System Validation Engineer. In this highly visible role, you will be designing digital signal processing blocks for the next generation of optical data center connectivity products. You will be responsible for validating the ASIC architecture post and pre-silicon.

**Qualifications include:**

* MS in Electrical Engineering or Computer Engineering with 6 years or PhD with 3 years of experience in digital signal processing design for SerDes and serial link high-speed data center networking.
* Experience in post silicon validation of digital and analog mixed-signal IPs.
* Deep understanding of ADC and analog based optical and electrical interconnect architectures such as 100G/200G/400G per lane PAM4 and NRZ design trade-offs to drive attainment on metrics such as performance, power, and cost over the project lifetime.
* Experience translating CDR and equalization architectures into Verilog code for logic synthesis.
* Proficient with Matlab, Simulink and Verilog-HDL/System Verilog coding.
* Experience with front end tools such as NCVerilog, NCSIM, Simvision, Spyglass.
* Exposure to Design for test, understanding of scan concept and writing DFT friendly RTL.
* Experience in synthesis, CDC, static timing analysis.
* Exposure to SDF annotated simulations with good understanding of parasitic delays.

**Highly Desired Qualifications:**

* Good understanding of high speed DSP applications and algorithms.
* Prior experience of high speed ADC, FFE, DFE, CDR Adaptation algorithms for PAM4 signals.
* Understanding of logic optimization for low power, timing margins & DFT.
* Deep understanding of Signal Integrity and Power Integrity modeling for High Speed designs.
* Understanding & exposure to Verilog AMS simulation, experience in behavioral models of analog circuits will be helpful.
* Willing to work in a multifunctional role.
* Strong written and verbal communication skills, with the specific ability to speak to various technical and management levels.
* Proactive, collaborative and creative approach to innovation, technical development and consensus facilitation to influence optimal project results.
* Excellent time and task management, and interpersonal skills.

**Additional Job Description:**

**Compensation and Benefits**

The annual base salary range for this position is $120,000 - $192,000

As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

**Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.**

**If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.**

Categories
  • Validation Engineer
Salary
  • $50,000+
Vacancy type
  • FullTime

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